Guide to the Rob Walker Papers

Steve Mandeville-Gamble

Department of Special Collections

Green Library

Stanford University Libraries

Stanford, CA 94305-6004

Phone: (650) 725-1022

Email: speccollref@stanford.edu

URL: http://www-sul.stanford.edu/depts/spc/

Guide to the Rob Walker Papers

Collection number: M0742

Department of Special Collections and University Archives

Stanford University Libraries

Stanford, California

Processed by:: Steve Mandeville-Gamble
Date Completed:: October 2003
Encoded by:: Steve Mandeville-Gamble and Bill O'Hanlon

Descriptive Summary

Title: Rob Walker papers

Dates: 1982-1995

Collection number: M0742

Creator: Walker, Rob

Collection Size: 8 linear ft.

Repository: Stanford University. Libraries. Dept. of Special Collections and University Archives.

Abstract: The collection contains presentation slides, reports, sales material, and other documentation from from LSI Logic Corp.; articles and papers given by Rob Walker; documents from Fairchild Semiconductor; specifications from Lawrence Livermore Laboratories; and, documentation from Philco Corp.

Languages: Languages represented in the collection: English

Access

Collection is open for research; materials must be requested at least 24 hours in advance of intended use.

Publication Rights

Property rights reside with the repository. Literary rights reside with the creators of the documents or their heirs. To obtain permission to publish or reproduce, please contact the Public Services Librarian of the Dept. of Special Collections.

Preferred Citation

Rob Walker papers, M0742. Dept. of Special Collections, Stanford University Libraries, Stanford, Calif.

Acquisition Information

Gift of Rob Walker, 1995 (Accession 1995-030), 1998 (Accession 1998-303), 2003 (Accession 2003-269), and 2005 (Accession 2005-110)

Biography / Administrative History

Walker is an ASIC (Application specific integrated circuits) consultant and founder of LSI Logic. He is also the author of SILICON DESTINY: THE STORY OF ASIC AND LSI LOGIC CORPORATIONS, CMC Publications (Milpitas, Calif.), 1993.

Scope and Content of Collection

The collection contains manuals, binders of research materials, documents, and minutes of meetings from Fairchild Semiconductor; materials documenting Walker's career at LSI Logic, including correspondence, presentation slides, reports, publications put out by the Corporate Communications Department, as well as articles and papers by Rob Walker and by others; technical data from Walker's research at Lawrence Livermore Laboratories in the 1960's; technical manuals, marketing materials, and other documents accumulated during Walker's years at Philco Corp.; and an audiocassette of a 1995 interview with Walker.

Arrangement

Arranged into five series: Series 1: Fairchild Semiconductor materials; Series 2: LSI Logic Corp. materials; Series 3: Lawrence Livermore Laboratory materials; Series 4: Philco Corp. materials; and Series 5: Audiovisual materials.

Indexing Terms

The following terms have been used to index the description of this collection in the library's online public access catalog.

Subjects

Fairchild Camera and Instrument Corporation. Fairchild Semiconductor Division.

LSI Logic Corporation.

Application specific integrated circuits.

Computer industry.

Microelectronics industry--California--Santa Clara County.

Science--History.

Other Index Terms Related to this Collection

The rise of the silicon architect companies : manuscript draft.

Collection Contents

Series 1 Fairchild Semiconductor materials, 1966-1972

Series Scope and Content Summary

This series contains manuals, binders of research materials and documents, articles and papers by Rob Walker, and minutes of Fairchild meetings.

Box 1, Folder 1

Fairchild binder, 1966

Box 1, Folder 2

Fairchild binder, 1967

Box 1, Folder 3

Fairchild binder, 1968

Box 1, Folder 4

Fairchild binder, 1969

Box 1, Folder 5

Fairchild binder, 1970

Box 1, Folder 6

Fairchild binder, 1971

Box 1, Folder 7

Fairchild binder, 1972

Box 1, Folder 8

Fairchild Micro Matrix design handbook, 1966

Box 1, Folder 9

Fairchild Micromatrix handbook, 1968

Box 1, Folder 10

FAIRSIM user manual, and, FAIRSIM II user manual, 1968 - 1969

Box 1, Folder 11

Fairchild Semiconductor. Plan ahead for LSI / by Cloyd E. Marvin and Robert Walker, 1967 Jan. 13

Box 1, Folder 12

Standard ICS for digital data communication / R.M. Walker and R.A. Aldrich. -- In Electrical Engineer, 1968 Mar.

Box 1, Folder 13

MSI digital voter provides error detection and correction / Robert M. Walker, n.d.

Box 1, Folder 14

PPC meeting minutes - Fairchild MOS, 1968 July 17

Box 1, Folder 15

Reunion of Fairchild Micromosaic people, 1981 Feb. 18

Box 1, Folder 16

Fairchild miscellaneous

Series 2 LSI Logic Corp. materials, 1982-1994

Series Scope and Content Summary

This series contains materials documenting Rob Walker's career at LSI Logic, and includes correspondence, presentation slides, reports, publications put out by the Corporate Communications Department, as well as articles and papers by Rob Walker and by others.

Subseries 2.1 Correspondence and memos, 1981-1990

Subseries Scope and Content Summary

This subseries contains correspondence and memos to and from Rob Walker relating to LSI Logic's project, products, and goals.

Box 1, Folder 17

Correspondence re: litigation -- Lear Siegler, Inc. vs. LSI Logic Corp., 1982 Jan. 12

Box 1, Folder 18

Correspondence, 1983

Box 1, Folder 19

Memos, 1981

Box 1, Folder 20

Memos, 1982

Box 2, Folder 1

Memos, 1983

Box 2, Folder 2

Memos, 1984

Box 2, Folder 3

Memos, [1984?]

Box 2, Folder 4

Memos, 1985

Box 2, Folder 5

Memos, 1986

Box 2, Folder 6

Memos, 1987

Scope and Content Note

Includes extensive memos on LSI's Modular Design Environment.

Box 2, Folder 7

Memos, 1988

Box 2, Folder 8

Memos, 1990 Feb.

Box 2, Folder 9

Memos, n.d.

Series 2.2 Presentation materials, 1981-1990

Subseries Scope and Content Summary

This series is almost entirely comprised of photocopies of slide cells for talks that Rob Walker gave while at LSI Logic to both internal and external audiences.

Box 2, Folder 10

Logic array customers foil, 1981 Mar. 25

Box 2, Folder 11

Advantages of the phased ILC approach,1981 July 30

Box 2, Folder 12

LSI design philosophy, 1981 Nov.

Box 2, Folder 13

Testing logic arrays : copy of issue to Hellman, et al., 1981 Nov.

Box 2, Folder 14

Slip of the lip could sink a chip presentation foil, 1981 Dec.

Box 2, Folder 15

LDSI requires access to the following ....,ca. 1981

Box 2, Folder 16

LSI Logic ECL approach, ca. 1981

Box 2, Folder 17

VTM4 - work stations presentation, ca. 1981

Box 2, Folder 18

Miscellaneous presentation foils, ca. 1981

Box 2, Folder 19

Off chip driver circuit & I/O voltage levels presentation, 1982 Feb. 13

Box 2, Folder 20

Design partners & ECL product plans, 1982 Feb.

Box 2, Folder 21

LSI Logic Corp. approach to arrays, 1982 Mar. 1

Box 2, Folder 22

High performance, bipolar array (HBA) presentation, 1982 Mar. 3

Box 2, Folder 23

Engineering status presentation, 1982 May 18

Box 2, Folder 24

AMD presentation / Rob Walker & Dan Wong, 1982 June 24

Box 2, Folder 25

ECL arrays, 1982 July 12

Box 2, Folder 26

July flash & August forecast, 1982 Aug. 3

Box 2, Folder 27

VTM1.LDS1 test foils, 1982 Oct. 11

Box 2, Folder 28

New CAD tools, 1982 Dec.

Box 2, Folder 29

Logic arrays presentation, 1982

Box 2, Folder 30

Miscellaneous CMOS & Macrocell foils, 1982

Box 2, Folder 31

Chip size presentation, ca. 1982

Box 2, Folder 32

Comparison of gate arrays & standard cell approaches to user-defined VLSI, ca. 1982

Box 2, Folder 33

Design interface IIA, IIE, & III presentations, ca. 1982

Box 2, Folder 34

Pad limited designs presentation, ca. 1982

Box 2, Folder 35

VTM3 digital foils, ca. 1982

Box 2, Folder 36

Customer visibility and control, 1983 Jan.

Box 2, Folder 37

LDSI - LSI 5 k enhancements, 1983 Jan.

Box 2, Folder 38

Macrocell application presentation, 1983 Jan.

Box 2, Folder 39

Technological leadership presentation, 1983 Feb. 9

Box 2, Folder 40

LSI Logic ECL approach presentation, 1983 Feb.

Box 3, Folder 1

Market presentation, ca. 1983 Feb.

Box 3, Folder 2

MPI / LSI logic relationships, ca. 1983 Feb.

Box 3, Folder 3

Benchmark presentation, 1983 Oct.

Box 3, Folder 4

Layout related CAD development, 1983 Nov.

Box 3, Folder 5

Monthly status report presentation, ca. 1983 Nov.

Box 3, Folder 6

LDS presentation, ca. 1983

Box 3, Folder 7

VTM5 CAD tools presentation, ca. 1983

Box 3, Folder 8

1984 engineering plan presentation, ca. 1983

Box 3, Folder 9

Silicon structures management review presentation, 1984 Jan.

Box 3, Folder 10

Ericcson meeting presentation, 1984 Jan. or Feb.

Box 3, Folder 11

LSI Logic application specific IC families presentation, 1984 Apr.

Box 3, Folder 12

IC benchmark presentation, 1984 Apr.

Box 3, Folder 13

Star project review presentation, 1984 June 26

Box 3, Folder 14

Review of engineering operations Q2 / Q3, 1984 July 17

Box 3, Folder 15

Toshiba SOS 7840 presentation, 1984 Aug. 27

Box 3, Folder 16

Logic array design presentation, 1984 Sept. 13

Box 3, Folder 17

Norden / LSI Logic meeting presentation, 1984 Sept. 19

Box 3, Folder 18

Toshiba presentation, 1984 Sept.

Box 3, Folder 19

Engineering quarterly meeting presentation, 1984 Oct. 22

Box 3, Folder 20

Design accuracy, 1984 Oct. 22

Box 3, Folder 21

Miscellaneous presentations, 1984 Oct.

Box 3, Folder 22

Gate array benchmark presentation, 1984 Nov.

Box 3, Folder 23

LSI Logic Corp. [end of year presentation], 1984

Box 3, Folder 24

LDS approach, 1985 Nov. 15

Box 3, Folder 25

Compiler presentation, 1985 Dec. 4

Box 3, Folder 26

LSI Logic Corp. MACGEN presentation, 1986 Jan. 10

Box 3, Folder 27

Year of computer revolution presentation, 1986 Feb. 11

Box 3, Folder 28

Structured compiler presentation, 1986 Apr. 10

Box 3, Folder 29

Modern 32-bit workstations exhibit, 1986 May 30

Box 3, Folder 30

Projects presentation, 1986 May 30

Box 3, Folder 31

LSI Logic presentation to the Department of Defense, National Security Agency, and Central Intelligence Agency, 1986 June

Box 3, Folder 32

Systems Research Laboratory presentation, 1986 July

Box 3, Folder 33

Radiation hardened arrays presentation, 1986 July 17

Box 3, Folder 34

Classic silicon compilers - a failure, 1986 Aug. 4

Box 3, Folder 35

LSI Design System (LDS 1) foils, 1986 Aug. 4

Box 3, Folder 36

Cell design at LSI Logic presentation, 1986 Aug. 7

Box 3, Folder 37

Sequent status presentation, 1986 Aug. 26

Box 3, Folder 38

Crush presentation, 1986 Aug. 31 & Sept. 2

Box 3, Folder 39

Flexible interface presentation, 1986 Sept. 2

Box 3, Folder 40

LSI design environment presentation, 1986 Oct. 22

Box 3, Folder 41

LDS design environment presentation, 1986 Nov. 25

Box 3, Folder 42

Steak presentation, 1986 Nov. 26

Box 3, Folder 43

LDS system and modular design presentation, 1987 Mar.

Box 3, Folder 44

Computers & semiconductors : a battle of survival presentation, 1989 Nov. 27

Box 3, Folder 45

ASIC test - a status report, 1990 Sept.

Box 3, Folder 46

AMD / LSI engineering issues presentation, n.d.

Box 3, Folder 47

ASIC supplier presentation, n.d.

Box 3, Folder 48

CAE workstations presentation, n.d.

Box 3, Folder 49

CMOS presentation, n.d.

Box 3, Folder 50

Miscellaneous CMOS presentations, n.d.

Box 3, Folder 51

DC parametrics test input, n.d.

Box 3, Folder 52

LDSI functional outline, n.d.

Box 3, Folder 53

Lies people tell : LSI ...., n.d.

Box 3, Folder 54

LSI design philosophy, n.d.

Box 3, Folder 55

Equivalent gates for PLAS, n.d.

Box 3, Folder 56

Macrocell / macrofunction concept, n.d.

Box 3, Folder 57

Rob's overview & extra foils, n.d.

Box 4, Folder 1

Why call it a development system?, n.d.

Box 4, Folder 2

Slides, n.d.

Series 2.3 Corporate communications materials, 1980-1991

Subseries Scope and Content Summary

This subseries contains reports, publications, press releases, and other documents put out by the Corporate Communications Department of LSI Logic.

Box 4, Folder 3

LSI business plan, 1980 Nov.

Box 4, Folder 4

LSI business principles : proposed, ca. 1980

Box 4, Folder 5

Board of Directors meeting, 1981 June 23

Box 4, Folder 6

LSI Logic Corp. notice of annual meeting of stockholders, 1991 May 9

Box 4, Folder 7

Annual report, 1986

Box 4, Folder 8

Annual report, 1987

Box 4, Folder 9

Quarterly reports, 1986

Box 4, Folder 10

Quarterly reports, 1988

Box 4, Folder 11

LSI Logic Corp. consolidated financial settlements, 1982 Dec. 31 and 1981

Box 4, Folder 12

Employee handbook, 1987 Jan.

Box 4, Folder 13

Celebrating LSI Logic's first decade, 1981 - 1991, 1991

Box 4, Folder 14

LSI Logic Corp. news / investment update, 1986 Jan.

Box 4, Folder 15

LSI Logic Corp. news / investment update, 1987 Jan.

Box 4, Folder 16

Organization chart, n.d.

Box 4, Folder 17

Press releases, n.d.

Box 4, Folder 18

LSI Logic Corp. 5-year plan presentation, 1985 Oct. 11

Box 4, Folder 19

Logically speaking : a newsletter for the employees of LSI Logic Corp., Vol. 1, no. 1 - ,1984 Dec.

Subseries 2.4 Reports, 1981-1984

Subseries Scope and Content Summary

This subseries contains reports generated by LSI Logic Corp.

Box 4, Folder 20

CMOS macrocell library. -- Rev. 1, 1981 Oct.

Box 4, Folder 21

CMOS macrocell and macrofunction library. -- Rev. 2, 1982 Jan.

Box 4, Folder 22

Engineering Q2 / Q3 report, 1984

Box 4, Folder 23

ISAS status reports, 1983 - 1984

Box 5, Folder 1

Untitled report [1 of 2], 1982 June

Box 5, Folder 2

Untitled report [2 of 2], 1982 June

Box 5, Folder 3

Untitled partial report on founding of LSI, n.d.

Box 5, Folder 4

Untitled partial report re: CAD, n.d.

Box 5, Folder 5

Automatic fault generation subsystem - generated faults, n.d.

Subseries 2.5 Research and development files, 1982 - 1986, n.d.

Subseries Scope and Content Summary

This subseries contains technical information and specifications produced by LSI Logic Corp. in its research and development.

Box 5, Folder 6

An OPUS : technical info, 1986 Dec. 12

Scope and Content Note

Includes computer code and circuit diagrams.

Box 5, Folder 7

MIO Macrocell logic element, n.d.

Scope and Content Note

Includes circuit diagrams.

Box 5, Folder 8

Series 7000 2 micron CMOS macrocell arrays, 1982

Box 5, Folder 9

SKELISIM code, n.d.

Box 5, Folder 10

3-bit up-down counter : technical information, 1986 Dec. 9

Box 5, Folder 11

Circuit photograph, n.d.

Subseries 2.6 Sales and marketing materials, 1983 - 1989

Subseries Scope and Content Summary

This subseries contains sales and marketing materials generated by LSI Logic Corp.

Box 5, Folder 12

Product brochures, n.d.

Box 5, Folder 13

Short form catalog, 1988 Nov.

Box 5, Folder 14

Various data sheets, etc., n.d.

Box 5, Folder 15

LSI Logic sales update ASIC ASAP new product primer [1 of 3], 1987

Box 5, Folder 16

LSI Logic sales update ASIC ASAP new product primer [2 of 3], 1987

Box 5, Folder 17

LSI Logic sales update ASIC ASAP new product primer [3 of 3], 1987

Box 5, Folder 18

ECL array sales bits, 1983

Box 5, Folder 19

SPARCstation and LSI Logic, 1989

Box 5, Folder 20

Proposal to Digital Equipment Corporation, n.d.

Box 5, Folder 21

Customer survey, 1983

Box 5, Folder 22

Semicustom LSI vendor survey, n.d.

Access Information

Note: "Confidential" stamped on front of document.

Subseries 2.7 Papers and articles by Rob Walker, 1981-1994

Subseries Scope and Content Summary

This subseries contains papers and articles written by Rob Walker while at LSI Logic Corp.

Box 6, Folder 1

LSI gate arrays outpace standard logic / Robert Hartmann & Rob Walker, 1981 Mar. 5

Box 6, Folder 2

Logic arrays, technologies, and design / Rob Walker, 1981

Box 6, Folder 3

Converting SSI/MSI and PLA designs to CMOS logic arrays / Rob Walker, Richard Derickson, & Keith R. Lobo, 1982

Box 6, Folder 4

Partitioning systems into logic arrays / Rob Walker, 1982

Box 6, Folder 5

A systems approach to logic arrays / Rob Walker & Don Snoderman, 1982

Box 6, Folder 6

Logic design for CMOS logic arrays / Rob Walker & Richard Derickson, 1983 Feb.

Box 6, Folder 7

Gate arrays and standard cell / Rob Walker, 1983 Mar.

Box 6, Folder 8

LSIM / ZSIM paper / Rob Walker, 1984

Box 6, Folder 9

Technology upstarts rock ASIC market / Rob Walker. -- In Electronic Engineering Times, 1994 Nov. 14

Box 6, Folder 10

ASIC test / Rob Walker, n.d.

Box 6, Folder 11

Gate arrays - custom VLSI that is available now / Rob Walker, n.d.

Box 6, Folder 12

LDS-III multi-array design system / Rob Walker & James S. Koford, n.d.

Box 6, Folder 13

Reflections from product planning / Rob Walker, n.d.

Box 6, Folder 14

Untitled manuscript / Rob Walker, n.d.

Box 6, Folder 15

Figures from unidentified article / Rob Walker, n.d.

Subseries 2.8 Papers and articles by other LSI employees, 1981

Subseries Scope and Content Summary

This subseries contains papers and articles written by colleagues of Rob Walker at LSI Logic Corp.

Box 6, Folder 16

Current trends and future capability of LSI / W.J. Corrigan, n.d.

Box 6, Folder 17

A design example - programmable digital audio frequency synthesizer / by Richard Derickson, n.d.

Box 6, Folder 18

A development system for logic arrays / James S. Koford and Edwin R. Jones, 1981

Subseries 2.9 Articles and clippings about LSI, 1981-1994

Subseries Scope and Content Summary

This subseries contains articles and clippings from newspapers, magazines, and other publications LSI Logic Corp.

Box 6, Folder 19

Articles and clippings, n.d.

Box 6, Folder 20

Articles and clippings, n.d.

Subseries 2.10 Training materials, n.d. n.d.

Subseries Scope and Content Summary

This subseries contains training materials generated by LSI Logic Corp.

Box 6, Folder 21

LSI Logic training course : agenda, n.d.

Box 6, Folder 22

Kiet agreement, n.d.

Subseries 2.11 Biographical information, n.d.

Subseries Scope and Content Summary

This subseries contains biographical information about Rob Walker that LSI Logic Corp. included in its publications and corporate documents.

Box 6, Folder 23

Biographical information, n.d.

Box 6, Folder 24

Rob Walker biography, n.d.

Subseries 2.12 Miscellaneous, n.d.

Subseries Scope and Content Summary

This subseries contains miscellaneous materials generated by LSI Logic Corp.

Box 6, Folder 25

Miscellaneous notes, n.d.

Box 6, Folder 26

New York resolutions, ca. 1986

Series 3 Lawrence Livermore Laboratories materials, 1958-1963

Series Scope and Content Summary

This series contains technical data and reports on various circuit-design projects.

Box 6, Folder 27

Read out for 256 PHA, 1958

Box 6, Folder 28

Thyratron used as combination gate, storage, and driver for punched paper-tape output / Robert M. Walker, 1959 July 27

Box 7, Folder 1

3D analzyer readout, PHA recordings and Min-Max selector, 1960

Box 7, Folder 2

Recording system, analog-to-digital convertor, 100-channel commutator specifications, 1960

Box 7, Folder 3

Digital data procedures / Logic module, 1962

Box 7, Folder 4

Gate flip flop, two channel P.C. card core monitor Astron resistence measurement system, 1962 - 1963

Box 7, Folder 5

Resistence measurement system, 1963

Box 7, Folder 6

A handbook of selected semiconductor circuits / prepared by Transistor Applications, Inc. for Bureau of Ships, Dept. of the Navy. -- Washington, D.C. : U.S. Government Printing Office, 1960

Series 4 Philco Ford materials, 1963-1968

Series Scope and Content Summary

This series contains technical manuals, marketing materials, and other documents generated by Philco Corp. It also contains a copy of the manuscript and the final published version of an article written by Rob Walker entitled: "A building block approach to digital-to-analog convertors".

Box 7, Folder 7

System 4-D maintenance. Model 701 logic module test (WDL-TS-58A). -- Palo Alto, Calif. : Philco. WDL Division, 1966 Jan. WDL HB1050

Box 7, Folder 8

System 4-D digital logic building blocks. -- Palo Alto, Calif. : Philco. WDL Division [1 of 2], 1966 Apr. 1

Box 7, Folder 9

System 4-D digital logic building blocks. -- Palo Alto, Calif. : Philco. WDL Division [2 of 2], 1966 Apr. 1

Box 8, Folder 1

Optimized microelectronics packaging configuration. -- Palo Alto, Calif. : Philco. WDL Division, 1965 Apr. 2 WDL-TP1860

Box 8, Folder 2

Phase 1 report Gemini terminal landing system data subsystem A201.BADA. -- Palo Alto, Calif. : Philco. WDL Division, 1965 Dec. 23

Box 8, Folder 3

Mark II Avionics Systems. -- Rev. to Part III, section 3. -- Palo Alto, Calif. : Philco. WDL Division, 1966 July 8 WDL-TP21866A

Box 8, Folder 4

A building block approach to digital-to-analog convertors / Rob Walker. -- In The Electronic Engineer, 1968 May

Box 8, Folder 5

A building block approach to analog convertors, n.d.

Box 8, Folder 6

Philco Logic module tester, model 701, n.d.

Box 8, Folder 7

Philco micromodules short term catalog, n.d.

Box 8, Folder 8

Micromodules, n.d.

Box 8, Folder 9

Philco to design Apollo control center : advertisement. -- In Aviation Week & Space Technology, 1963 June 17

Box 8, Folder 9

Philco to design Apollo control center : advertisement. -- In Aviation Week & Space Technology, 1963 June 17

Series 5 Audiovisual materials, 1995 May 31

Series Scope and Content Summary

This series contains the audiocassette tape of an interview with Rob Walker done on May 31, 1995.

Audiocassette 1

Rob Walker interview on KALW, 1995 May 31

Physical Description: 1 audiocassette

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